// Block Name (Original): TestLAD
// Block Number: 2
// Original Language: LAD

FUNCTION_BLOCK "TestLAD"
{ S7_Optimized_Access := 'TRUE' }
VERSION : 0.1

VAR_INPUT
END_VAR

VAR_OUTPUT
END_VAR

VAR_IN_OUT
END_VAR

VAR_STAT
  "stat_M19001" : Bool; // Memory for edge detection
END_VAR

VAR_TEMP
END_VAR

BEGIN

  // Network 1: Clock Bit

  // RLO: "Clock_10Hz"
  "stat_M19001" := "Clock_10Hz"; // P_TRIG: "Clock_10Hz" AND NOT "stat_M19001"
  "Clock_5Hz" := "Clock_10Hz" AND NOT "stat_M19001";

  // Network 2: Clock Bit

  // RLO: (NOT "Clock_10Hz")
  "stat_M19001" := (NOT "Clock_10Hz"); // N_TRIG: NOT (NOT "Clock_10Hz") AND "stat_M19001"
  "Clock_5Hz" := NOT (NOT "Clock_10Hz") AND "stat_M19001";

END_FUNCTION_BLOCK