82 lines
3.8 KiB
Python
82 lines
3.8 KiB
Python
# processors/process_coil.py
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import sympy
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from .processor_utils import get_sympy_representation, sympy_expr_to_scl, get_target_scl_name, format_variable_name
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from .symbol_manager import SymbolManager, extract_plc_variable_name
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SCL_SUFFIX = "_sympy_processed"
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def process_coil(instruction, network_id, sympy_map, symbol_manager, data):
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"""Genera la asignación SCL para Coil, simplificando la entrada SymPy."""
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instr_uid = instruction["instruction_uid"]
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instr_type_original = instruction.get("type", "Coil")
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if instr_type_original.endswith(SCL_SUFFIX) or "_error" in instr_type_original:
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return False
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# Get input expression from SymPy map
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coil_input_info = instruction["inputs"].get("in")
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sympy_expr_in = get_sympy_representation(coil_input_info, network_id, sympy_map, symbol_manager)
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# Get target variable SCL name
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target_scl_name = get_target_scl_name(instruction, "operand", network_id, default_to_temp=False) # Coil must have explicit target
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# Check dependencies
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if sympy_expr_in is None:
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# print(f"DEBUG Coil {instr_uid}: Input dependency not ready.")
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return False
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if target_scl_name is None:
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print(f"Error: Coil {instr_uid} operando no es variable o falta info.")
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instruction["scl"] = f"// ERROR: Coil {instr_uid} operando no es variable."
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instruction["type"] = instr_type_original + "_error"
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return True # Processed with error
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# *** Perform Simplification ***
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try:
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#simplified_expr = sympy.simplify_logic(sympy_expr_in, force=False)
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#simplified_expr = sympy_expr_in
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simplified_expr = sympy.logic.boolalg.to_dnf(sympy_expr_in, simplify=True)
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except Exception as e:
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print(f"Error during SymPy simplification for Coil {instr_uid}: {e}")
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simplified_expr = sympy_expr_in # Fallback to original expression
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# *** Convert simplified expression back to SCL string ***
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condition_scl = sympy_expr_to_scl(simplified_expr, symbol_manager)
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# Generate the final SCL assignment
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scl_assignment = f"{target_scl_name} := {condition_scl};"
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scl_final = scl_assignment
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# --- Handle Edge Detector Memory Update (Logic similar to before) ---
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# Check if input comes from PBox/NBox and append memory update
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mem_update_scl_combined = None
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if isinstance(coil_input_info, dict) and coil_input_info.get("type") == "connection":
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source_uid = coil_input_info.get("source_instruction_uid")
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source_pin = coil_input_info.get("source_pin")
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source_instruction = None
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network_logic = next((net["logic"] for net in data["networks"] if net["id"] == network_id), [])
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for instr in network_logic:
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if instr.get("instruction_uid") == source_uid:
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source_instruction = instr
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break
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if source_instruction:
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# Check for the original type before suffix was added
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orig_source_type = source_instruction.get("type", "").replace(SCL_SUFFIX, '').replace('_error', '')
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if orig_source_type in ["PBox", "NBox"] and '_edge_mem_update_scl' in source_instruction:
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mem_update_scl_combined = source_instruction.get('_edge_mem_update_scl')
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if mem_update_scl_combined:
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scl_final = f"{scl_assignment}\n{mem_update_scl_combined}"
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# Clear the source SCL?
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source_instruction['scl'] = f"// Edge Logic handled by Coil {instr_uid}"
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# Update instruction
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instruction["scl"] = scl_final
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instruction["type"] = instr_type_original + SCL_SUFFIX
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# Coil typically doesn't output to scl_map
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return True
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# --- Processor Information Function ---
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def get_processor_info():
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"""Devuelve la información para el procesador Coil."""
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return {'type_name': 'coil', 'processor_func': process_coil, 'priority': 3} |