36 lines
679 B
Plaintext
36 lines
679 B
Plaintext
// Block Name (Original): TestLAD
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// Block Number: 2
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// Original Language: LAD
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FUNCTION_BLOCK "TestLAD"
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{ S7_Optimized_Access := 'TRUE' }
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VERSION : 0.1
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VAR_INPUT
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END_VAR
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VAR_OUTPUT
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END_VAR
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VAR_IN_OUT
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END_VAR
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VAR_TEMP
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END_VAR
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BEGIN
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// Network 1: Clock Bit
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// RLO: "Clock_10Hz"
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// Logic moved to Coil 26
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"Clock_5Hz" := "Clock_10Hz" AND NOT "M19001";\n"M19001" := "Clock_10Hz"; // P_TRIG("Clock_10Hz") (Mem update handled by consumer)
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// Network 2: Clock Bit
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// RLO: "Clock_10Hz"
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// Logic moved to Coil 26
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"Clock_5Hz" := NOT "Clock_10Hz" AND "M19001";\n"M19001" := "Clock_10Hz"; // N_TRIG("Clock_10Hz") (Mem update handled by consumer)
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END_FUNCTION_BLOCK
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